AMD delays Phenom 2.4 GHz due to TLB errata

theinquirer.net ^ | Sunday, 18 November 2007, 5:29 PM | Theo Valich

[Ernest_at_the_Beach]

AMD WILL ONLY LAUNCH the Phenom 9500 and 9600. Even though the channel already got its hands on the Phenom 9700 (2.4 GHz) part, it will have to be pulled off from the shelves.

In a weird deja-vu, it turns out that the company found an errata in the TLB (Transition Lookaside Buffer), just like Intel did earlier this year with complete Core marchitecture. However, unlike Intel, that has a micro-code update function in all of its CPUs, AMD is forced to delay the introduction of the part.

This comes as a huge hit to AMD, at the time that evrything was looking somewhat better. On paper and in practice, its Chipsets Series 7 are world's finest at the moment - PCIe Gen2 implementation is near-perfect, old Athlon 64 X2 parts got a new life on them (insane HyperTransport overclocking options), while Radeon HD 3850 and 3870 are once again sparking a huge war in world of 3D graphics.

However, it turns out that the processor division of AMD botched this time around. We asked AMD to provide us with official statement on this huge problem, and we got a reply back from the firm:

"The Translation Lookaside Buffer (TLB) errata is an L3 protocol issue causing a system hang when running certain client workload applications independent of platform. AMD is immediately introducing an updated BIOS which will correct the TLB errata".

[SunkenCiv]

http://www.maximumpc.com/article/daily_news_brief_phenom_debuts
http://www.maximumpc.com/article/amd_on_the_rise_but_is_the_company_poised_for_a_fall
http://www.maximumpc.com/article/intels_barcelona_killer
http://www.maximumpc.com/article/intel_details_next_next_generation_cpu

[Dead Corpse]

It's called a microcode patch. Depending on what needs fixing, you can some times reroute calls via bios code.

And yes, AMD can do microcode patching too. Not sure where the author got the idea they can't...

[SunkenCiv]

It seems also that AMD’s margins are getting strangled off by the much bigger Intel, which has cut prices, and it has managed to cut production costs (compared to AMD) by making its cores separately, checking them out, then sticking them together for their duos and quads. Intel’s got better performance right now because (despite this approach being inherently slower, all other things being equal) it has 45 nm (if memory serves), compared with AMD’s 65 nm (if memory serves).

However, once AMD manages to match that figure (or better it), and reduce its costs (by that, and whatever else they do, such as yield improvement), things will get much better.

Also, I can’t believe that AMD would have taken this gamble unless the intent was continuing to develop this approach, such as nine-core, sixteen-core, twenty-five core, all on one wafer.

Unless they’re just stupid over there...

Chips Push Through Nano-Barrier
BBC | 1-27-2007
Posted on 01/27/2007 10:51:58 AM EST by blam
http://www.freerepublic.com/focus/f-news/1774609/posts

“’Big Blue’, which developed the transistor technology with partners Toshiba, Sony and AMD, intends to incorporate them into its chips in 2008.”

IBM, Intel Reach Chip Milestone in Dead Heat
TechNewsWorld TechNewsWorld | 01/29/07 2:31 PM PT | Walaika Haskins TechNewsWorld
Posted on 01/29/2007 6:32:05 PM EST by Ernest_at_the_Beach
http://www.freerepublic.com/focus/f-chat/1775756/posts

“IBM, which is conducting its research with partners AMD and Toshiba , says it will be 2008 before it begins producing 45-nanometer chips based on the new technology.”

Intel Launching New Chip Lineup
AP | November 11, 2007 | Jordan Robertson
Posted on 11/11/2007 5:49:12 PM EST by Anti-Bubba182
http://www.freerepublic.com/focus/f-news/1924301/posts

“Sunnyvale-based AMD, which partners with IBM Corp. on chip-making technology, is targeting mid-2008 to start selling its 45-nanometer chips. AMD has long maintained that its chips have certain design advantages that keep them competitive with Intel’s best offerings. One of those features is an integrated memory controller, which AMD has long championed. Intel only said recently it would begin incorporating the controllers into future generations of chips.”

[Still Thinking]

But for the BIOS to be able to reroute the calls, wouldn’t they be calls the processor already makes via the BIOS? And if so, why would the CPU be making calls to the BIOS for information stored internally? (Apologize as this is probably a dumb question)

[SunkenCiv]

The CPU needs the BIOS to do stuff involving memory, caches, etc, so the code in the BIOS is patched to fix whatever this problem is (which apparently emerges in higher clock speeds).

[SunkenCiv]

AMD’s [”rather unique”] Triple-Core Processors —
Yield-Improvement Technique, Says Intel.
XBitLabs | 10/08/2007 | 11:53 PM ] | Anton Shilov
Posted on 10/17/2007 4:00:58 PM EDT by Ernest_at_the_Beach
http://www.freerepublic.com/focus/f-chat/1912630/posts

[snip] The new quad-core AMD Opteron and the forthcoming quad-core AMD Phenom processors use monolith implementation, which means that all the cores are incorporated into a single piece of silicon. By contrast, current quad-core processors from Intel use multi-chip-package technique and incorporate two dual-core processors onto a single piece of substrate. [end]