AFAIK, Curren't processors don't have a hardware stack. They just have registers. A "stack frame" is only a memory construct, not a hardware feature.
The presentation seemed to be based on the assumption that the registers would be used exclusively in read/modify/write cycles. I guess that's especially true for x86 processors with relatively small number of registers. But in processors with a large register set, a good compiler or assembly language program can optimize the code to minimize reads/writes to external memory.