Posted on 05/31/2002 6:09:58 PM PDT by Bobber58
Next Up For Wireless Communication: The Computer Chip Itself A team of researchers headed by a University of Florida electrical engineer has demonstrated the first wireless communication system built entirely on a computer chip. Composed of a miniature radio transmitter and antenna, the tiny system broadcasts information across a fingernail-sized chip, according to an article this month in the Journal of Solid State Circuits published by the Institute of Electrical and Electronics Engineers. "Antennas are going to get installed onto chips one way or another – it's inevitable," said Kenneth O, a UF professor of electrical and computer engineering and the lead researcher. "We are really the first group that is making the technology happen." The major sponsor of O's five-year research project is the Semiconductor Research Corp., an industry consortium that has provided about $1 million for the research. As chips increase in size and complexity, transmitting information to all parts of the chip simultaneously through the many tiny wires embedded in the silicon platform becomes more difficult, O said. Chip-based wireless radios could bypass these wires, ensuring continued performance improvements in the larger chips. These tiny radios-on-a-chip also could make possible tiny, inexpensive microphones, motion detectors and other devices, O said. The fastest chips on the market, used in the Pentium 4 and other high-end processors -- now operate at a speed of 2 gigahertz, meaning they perform 2 billion calculations per second, O said. Manufacturers are rapidly developing techniques to raise the speed, with chips that process information as fast as 20 gigahertz, or 20 billion calculations per second, already achieved on an experimental basis, he said. Many experts believe even 100-gigahertz chips are feasible. The increase in speed will be accompanied by an increase in chip size, O said. While today's average chip is about 1 square centimeter, or slightly under half an inch, the faster chips anticipated in the next two decades are expected to be as large as 2 or 3 centimeters, or about 1.2 inches, on each side, he said. The larger the chip, the harder it is to send information to all of its regions simultaneously because the distances between the millions of tiny circuits within the chip become more varied, O said. This can impact the chip's performance when the delay affects distribution of the so-called "clock signal," a basic signal that synchronizes the many different information-processing tasks assigned to the chip. For optimum performance, this signal must reach all regions of the chip at essentially the same time. In the May article, O and his colleagues report broadcasting the clock signal from a tiny transmitter on one side of a chip a distance of 5.6 millimeters, or about a fifth of an inch, across the chip to a tiny receiver at the other end, avoiding all wires within the chip itself. "Instead of running the signal through the wires, what we did was broadcast and receive the signal," O said. The demonstration proved it is possible to use a wireless system to broadcast on-chip signals, he said. The potential applications for chip-based radios go beyond maintaining the performance of larger chips, O said. In general, the availability of such chips could lead to a chip-to-chip wireless communication infrastructure, seamlessly and constantly connecting desktops, handheld computers, mobile phones and other portable devices. In other potential applications, the military has expressed interest in pairing wireless chips with tiny sensors such as microphones. The idea is to drop thousands or even hundreds of thousands of these devices in a region to eavesdrop over a wide area. The chips would form a listening network by themselves, and the military monitor the system as needed, O said. On the civilian side, O said, scientists and engineers have theorized the wireless chips could be paired with motion detectors and implanted in the walls of buildings. If a building collapsed due to an earthquake, for instance, the network of chips could broadcast information about movement to rescuers in search of victims.
That's a terrible definition of computational speed. Just because it functions at a certain frequency does not mean it will neccessarily conduct that many calculations a second.
I was just reading in June 2002 edition of CPU (Computer Power User)magazine, page 60 about Silicon-Based Radio.
Intel is working on this CMOS Radio project with the ultimate goal of getting all of the component parts into a sincle piece of silicon within the cost and performance goals.
I'm already aware of a single-chip broadcast FM receiver... just hook up an antenna, bias voltages, varistor for tuning, etc.. so easy to demodulate FM with a PLL circuit.
In computer circuitry, one limit to the overall speed is the fact that signals leaving one chip have to travel on a length of wire to get to another chip. Using RF for the transport, and embedding more function into big chips, can speed things up quite a bit.
But when these boxes finally make it to the market, they're likely to be pretty heavy... from all of the RF shielding that the FCC is gonna make 'em use to pass the emissions tests.
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