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The reasons I think that AMD has a better solution than Intel are two fold. First, I believe that Hyper-Transport is a superior communications protocol, when compared to the Intel Front Side Bus. HT allows for 1,2,4,8,16 bit and beyond buses, running at speeds in excess of 2 GHZ, that are ONE WAY ONLY. This is to say, that we have a dedicated 2Byte (16 bit) pipeline running at 2 GHz; or 4 GB/second from the processor to the 'North Bridge'; and another identical 4 GB/second pipeline running from the 'North Bridge' to the processor. There is no latency, where a component must request the bus, then must transfer a request; then wait for the bus to be free; such that a response may be sent. The buses constantly run, and requests are answered from a que.
Now I use the word 'North Bridge' cautiously, because the AMD 64 bit solutions do not have a true 'North Bridge'. The North Bridge historically tied the memory and the rest of the motherboard to the CPU. The AMD processors have the Memory Controller built into the CPU; so the on-board Memory Controller can direct data to the processor in question, can cache data or re-direct data to the appropriate destination without impacting the CPU operations (no wait states while this mess settles out). This is my second reason for chosing to Champion AMD's dual core solution.
Meanwhile, the Memory Controller function remains on the North Bridge in the Intel world. Now we get into cache coherency issues (if processor 1 is working in a memory range that processor 2 needs to get into; who has the most current data?). If you base your calcuation on stale data, the result will not only cause data corruption, it may completely invalidate the findings on the program. Given the way things are exectuted within the CPU, it's possible to run the same program numerous times (without cache coherencey in place) and get a different answer each and every time. This is what we, in the engineering circles call ....'bad'.