@masm here (unisys extended mod assembler).
Those were the days, when wasting a single instruction, or blowing your pipeline cache, were considered heretical actions.
Yep. We used to have to make sure we aligned instructions and storage on fullword boundaries. And used register-to-register instructions whenever possible to save cycles. And never let a CSECT get beyond a 4k page frame.
Talk about code that blazed!