Posted on 07/09/2012 10:52:57 AM PDT by Ernest_at_the_Beach
This set of patches implements the core Linux support for the AArch64
(64-bit ARM) architecture.
ARM introduced AArch64 as part of the ARMv8 architecture and consists of
a substantially revised exception model (with 4 exception levels: EL0 -
user, EL1 - kernel, EL2 - hypervisor, EL3 - secure monitor), new A64
instruction set based on larger register file, new FP/SIMD instructions.
The new ABI is LP64 and takes advantage of the larger register file and
mandates FP.
AArch64 documentation currently available (publicly, though
click-through agreement required):
- Instruction Set Overview:
http://infocenter.arm.com/help/topic/com.arm.doc.genc010197a/index.html
- ABI (PCS, ELF, DWARF, C++):
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0059a/index.html
The AArch64 Linux port follows the guidance for new architecture ports
using generic headers (including unistd.h) and as much generic code as
possible (some library functions may be later optimised, based on
benchmarking results).
There is no hardware platform available at this point. From a kernel
perspective, the aim is to minimise (or even completely remove) the
platform code from the architecture specific directory. FDT is currently
mandated and there are ongoing discussions for ACPI support.
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Regards,
(Excerpt) Read more at lkml.indiana.edu ...
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November 4, 2011 in ARM, News by DP
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ARM announced that they will release 64bit microcontrollers. The ARMv8 uC will feature a 64bit instruction set, as well as extended virtual addressing. The uCs will have two execution states, AArch32, and AArch64. While the AArch64 handles the 64bit instruction set, the AArch32 executes the existing ARM 32bit instruction set.
A compiler for the new 64bit instruction was already developed, and open source support is promised.
Via Adafruit. This entry was posted in ARM, News and tagged 64-bit ARMv8, AArch64, ARM.
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