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I'll second that. When I worked at Bell Labs later on in IC design (Poly Cell Design, and what later was termed ASIC) in the early and mid eighties we where concerned with ever being able to break the 1 micron channel length in our MOS processing techniques. The quantum mechanic models we where using (actually developing) within those technologies showed the limitations beyond that point.
Obviously the models where flawed. By the time I left AT&T in 94, our company was already doing .5 micron and working on .25 micron processes. Somewhere the true limits will be reached. I haven't the slightest idea at this point, and I have been totally away from all IC design and manufacturing for quite a few years at this point, where the dead end will actually occur for poly silicon based technologies.
And with that Ernest, your the last person I communicate with this evening so do have a great upcoming day. I'm off to checking out the CSPAN site for the latest in the Senate Armed Service Committee hearing with SOD Panetta and JCS Chairmen Dempsey.

"Obviously the models where flawed. By the time I left AT&T in 94, our company was already doing .5 micron and working on .25 micron processes. "

Yup. That's exactly where we were when I left TI at the end of 1994.