[Steely Tom]

Something's not right here. I calculate that 16 TB can be reached with 44 bits. A 64 bit address space spans approximately 18 million TB.

[PreciousLiberty]

“Something’s not right here. I calculate that 16 TB can be reached with 44 bits. A 64 bit address space spans approximately 18 million TB.”

The 16 TB limit is per process, and since it’s approximately 8,000 times larger than the memory in a decently equipped computer today it provides some serious headroom.

At current prices 16 TB of RAM runs approximately $280,000...also providing some headroom. ;-)

[NVDave]

The memory controllers and MMU’s don’t support 64 bits of physical address space. Right now, I’m using a Macbook Pro with an Intel Core 2 Duo. While the OS and CPU support 64 bit virtual addresses, the physical address space supported is 40 bits, and the memory architecture tops out at 4GB.

[conservatism_IS_compassion]

16 TB can be reached with 44 bits. A 64 bit address space spans approximately 18 million TB.

Now as you mention it, that sounds exactly right . . . if you keep to the convention that 1k = 2^10 =1024 rather than 1000, and 1k*1k = 1M, 1k*1M = 1G, 1k*1G = 1T, 1K*1T = 1P, and 1K*1P = 1E, that should not read 16T but 16E.

Unless they contemplate doing something really weird with the other 20 bits of available address space . . . like using the 20 most significant bits to assign the lion's share of the address space to mass memory other than RAM? That probably wouldn't do much that virtual memory concepts already, I suppose, in Unix, wouldn't already do anyway? http://www.sengpielaudio.com/ConvPrefe.htm">source

[ThePythonicCow]

The 16 TB limit is per process

This might be a Beckton (upcoming Intel chip) limit. That chip (and perhaps some other Nehalem chips ... I'm not sure) has 44 physical address bits coming off the die, and no doubt internally sizes TLB and cache memory address hardware to match those 44 bits.

As NVDave notes, such details do matter, down at the hardware level, when one actually has to spend transistors and (even worse) leads coming off the die for each such bit. Intel has to size such processors for the biggest case need; and the operating system people have to write to that hardware, making sure to manage all those 44 bits correctly.

And then the marketing people get to skim over the internal design docs, pick off some nice big number, and brag incoherently ;).

From my perspective, that 44 bits wasn't enough. I'm using that same chip in a system measured in petabytes of RAM, not terabytes. It takes some serious operating system and external hardware magic to add bits that aren't there.

[RightOnline]

Huh???