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1 posted on 11/18/2007 9:38:47 PM PST by Ernest_at_the_Beach
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To: ShadowAce

Tomorrow is the announce day too.


2 posted on 11/18/2007 9:39:32 PM PST by Ernest_at_the_Beach (No Burkas for my Grandaughters!)
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To: Ernest_at_the_Beach

Sucks.... we need competition. No one wants Intel to get like Microsoft


3 posted on 11/18/2007 9:40:47 PM PST by dennisw (Islam - "a transnational association of dangerous lunatics")
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To: Ernest_at_the_Beach

In a weird deja-vu, it turns out that the company found an errata in the TLB (Transition Lookaside Buffer), just like Intel did earlier this year with complete Core marchitecture. However, unlike Intel, that has a micro-code update function in all of its CPUs, AMD is forced to delay the introduction of the part.
***This is how Intel wins the game. In the early years when microprocessors were 8 bits they were up against Zilog. They both were moving to the next generation and Intel came up with a software simulation of its core architecture so that it could fix bugs quicker. Zilog engineers were so arrogant that they would say, “Bugs, what bugs?” or when there WERE bugs, it took them a looonnnggg time to fix them. In the meantime, Intel was able to cycle through the process in days rather than months. How many of us buy Zilog processors for our desktop computers today? History might repeat itself here.


6 posted on 11/18/2007 10:24:40 PM PST by Kevmo (We should withdraw from Iraq — via Tehran. And Duncan Hunter is just the man to get that job done.)
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To: rdb3; chance33_98; Calvinist_Dark_Lord; PenguinWry; GodGunsandGuts; CyberCowboy777; Salo; Bobsat; ..

7 posted on 11/19/2007 5:05:45 AM PST by ShadowAce (Linux -- The Ultimate Windows Service Pack)
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To: Ernest_at_the_Beach

That’s wierd. How can you fis an error in the CPU via a new BIOS?


8 posted on 11/19/2007 9:20:18 AM PST by Still Thinking (Quis custodiet ipsos custodes?)
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To: Ernest_at_the_Beach

>>>AMD delays Phenom 2.4 GHz due to TLB errata

I apologize.


18 posted on 11/19/2007 10:20:17 PM PST by tlb
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AMD’s Triple-Core Processors = Yield-Improvement Technique, Says Intel.
XBitLabs | 10/08/2007 | 11:53 PM ] | Anton Shilov
Posted on 10/17/2007 4:00:58 PM EDT by Ernest_at_the_Beach
http://freerepublic.com/focus/f-chat/1912630/posts

Intel Launching New Chip Lineup
AP | November 11, 2007 | Jordan Robertson
Posted on 11/11/2007 5:49:12 PM EST by Anti-Bubba182
http://www.freerepublic.com/focus/f-news/1924301/posts

and an oldie:

China claims microprocessor technology breakthrough
http://whampoafn.net/
Posted on 06/26/2007 10:10:24 AM EDT by Rock N Jones
http://www.freerepublic.com/focus/f-news/1856468/posts


19 posted on 11/21/2007 2:08:01 PM PST by SunkenCiv (Profile updated Sunday, November 18, 2007"'"'"'"'"'"'"'"'"'"'https://secure.freerepublic.com/donate/)
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http://www.maximumpc.com/article/daily_news_brief_phenom_debuts
http://www.maximumpc.com/article/amd_on_the_rise_but_is_the_company_poised_for_a_fall
http://www.maximumpc.com/article/intels_barcelona_killer
http://www.maximumpc.com/article/intel_details_next_next_generation_cpu


21 posted on 11/21/2007 2:13:26 PM PST by SunkenCiv (Profile updated Sunday, November 18, 2007"'"'"'"'"'"'"'"'"'"'https://secure.freerepublic.com/donate/)
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AMD’s [”rather unique”] Triple-Core Processors —
Yield-Improvement Technique, Says Intel.
XBitLabs | 10/08/2007 | 11:53 PM ] | Anton Shilov
Posted on 10/17/2007 4:00:58 PM EDT by Ernest_at_the_Beach
http://www.freerepublic.com/focus/f-chat/1912630/posts

[snip] The new quad-core AMD Opteron and the forthcoming quad-core AMD Phenom processors use monolith implementation, which means that all the cores are incorporated into a single piece of silicon. By contrast, current quad-core processors from Intel use multi-chip-package technique and incorporate two dual-core processors onto a single piece of substrate. [end]


26 posted on 02/02/2008 9:31:44 PM PST by SunkenCiv (https://secure.freerepublic.com/donate/__________________Profile updated Wednesday, January 16, 2008)
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