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To: js1138
Plus, considering neurons simply as digital processors ignores the probability that their chemical environment may play key roles in computation. All this can have digital equivalents, but I was addressing the performance issue of designing a brain with a 100 hz clock.

Absolutely. The real bottleneck for silicon simulation of such systems is that cache coherence requirements and core latency massively degrade the actual performance. It is the nature of the algorithm space. So rather than building massively parallel silicon to do it, we single-thread it and run it at very high speeds to maximize real-world throughput because that is the easiest way to make it scale on silicon. The brain may process at very slow speeds, but the massive parallelism is such that current processors still can't simulate that number of slow processes in real-time.

This particular problem space underscores just how slow the main memory is on our computers and how narrow the bandwidth is to the actual processors. I've been involved in some research on elegantly scaling that domain to multiple processor systems so that the you actually get a net increase in scalability (most naive attempts will actually make these run SLOWER with multiple processors due to the memory problems mentioned above).

327 posted on 07/09/2003 12:28:21 PM PDT by tortoise (All these moments lost in time, like tears in the rain.)
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To: tortoise
Cache coherence isn't much of a problem. I designed methods around this for the Cray XMP's. On the other hand, memory latency is a big problem.

We used to joke that a Cray was about a $1,000,000 worth of fast memory, $1,000,000 worth of fast CPU and $28,000,000 worth of switches.

There are only three things needed to run at high speed: bandwidth, bandwidth, and bandwidth.
328 posted on 07/09/2003 12:38:20 PM PDT by Doctor Stochastic (Vegetabilisch = chaotisch is der Charakter der Modernen. - Friedrich Schlegel)
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