STMicroelectronics, GlobalFoundries to Build 300-mm Fab in Crolles

EE Times ^

[BiteYourSelf]

That’s some big chips.😳

[lefty-lie-spy]

300mm (30 cm or 11 inch transistors / microprocessors) are, well, pretty much late 1940s / early 1950s technology, no?

[Yo-Yo]

That’s some big chips.😳

300-mm - is that 300 square mm in area, as in a 17mmx17mm die?

[sasquatch]

Started at 1 1/4 inch, ended at 200 mm (IBM w/notch)

[lefty-lie-spy]

I remember back in the 1990s when the technology media was saying that we would never be able to make a chip with smaller than 25 nanometer traces due to physics limits.

[lefty-lie-spy]

Jinx. I’m your friend, bro.

[Zathras]

GF-STM have abandoned any process smaller than 14nm.
There is still plenty of demand for older technology.
Both IBM and AMD abandoned GF on 7nm as they couldn’t get it to work.

[FarCenter]

300 mm is the diameter of the silicon wafer. After lithography and other processing steps, the wafer is cut into the individual chips. The chips are then tested and bonded into packaging suitable for mounting on circuit boards. These latter steps are usually done in Southeast Asia, even for wafers from fabs in the US and Europe.

[Spktyr]

300mm refers to the size of the silicon wafer on which the chips will be created. A 300mm wafer will yield 640 ‘dies’ or individual chips per wafer.

https://en.wikipedia.org/wiki/Wafer_(electronics)

[Spktyr]

200mm was passed by 300mm in 2002, which was two decades ago. 450mm is the newest proposed standard size.

[Yo-Yo]

After asking Google, 300 mm is the diameter of the silicon wafer used to make the chips. The number of chips that can be made from a 300 mm diameter wafer depends on the size of the individual chip dies.

[Spktyr]

Silicon wafers don’t show up until 1960....

[fretzer]

~12” wafers.

[minnesota_bound]

#12 Those are the new cd’s. They will hold the new 8k movies...

[Spktyr]

Nope. The last optical drive format is BluRay - everything after is pure digital or flash.

[null and void]

Started at 2" bulk and SOS, have worked with 3/4" ingot sawn to create <100> and <111> wafers from the same melt (research project) Si, GaAsP on GaAs, GaP, Glass, CFQ, and exotics. Biggest Silicon I've personally run was 4" MEMS, foundried out 6" processes with PZT sensors.

[sasquatch]

Roommate at Hp built GaAs FETs up to a whopping 18GHz.
The building pulling GaAs became an EPA super fund site
at the bottom of Page Mill. Seems some arsenic got loose.
Long ago...

[sasquatch]

200mm was passed by 300mm in 2002

I’m an old fart.

[sasquatch]

Have not checked lately but Moore’s law used to work well.