How do you propose to write to a parallel flash memory chip without physical access to the /WE and /OE pins (the former pin being pulled high and the latter pin both pulled low and strapped low by the cap)? Is there any reason to expect any off-the-shelf flash chip to include such a feature?
Who could tell the difference between an off-the-shelf parallel flash memory chip and a modified one with identical packaging and marking? We would have to have an army of technicians with extensive training and specialized equipment which could also be ‘modified’ at will. Again, If public trust is desired high tech methods fall way short of the mark.