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New IBM chip breaks barriers to double speed
FT ^
Posted on 02/07/2006 2:06:47 PM PST by LesbianThespianGymnasticMidget
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To: LesbianThespianGymnasticMidget
Great ... .what software will be using the new speeds?
2
posted on
02/07/2006 2:08:14 PM PST
by
Centurion2000
(If the USA was the Roman Empire, Islam would have ceased to be a problem on 9/12/2001)
To: LesbianThespianGymnasticMidget
Uh, oh, Apple's going back to IBM!
3
posted on
02/07/2006 2:09:09 PM PST
by
Revolting cat!
("In the end, nothing explains anything.")
To: Centurion2000
Theres some speculation that this cpu will be the general purpose CPU in all 3 server lines (z,p,i)
To: LesbianThespianGymnasticMidget
I am not a techno geek, but this sounds fast.
5
posted on
02/07/2006 2:10:47 PM PST
by
Clump
To: LesbianThespianGymnasticMidget
You can no longer judge a processor's performance by speed but this is fast.
It probably runs on 220V and requires its own chiller.
6
posted on
02/07/2006 2:10:51 PM PST
by
TSgt
(Extreme vitriol and rancorous replies served daily. - Mike W USAF)
To: Centurion2000
"Great ... .what software will be using the new speeds?"
- Don't know...but I do know for certain that the advanced scientific and engineering breakthrough wasn't accomplished by muslims. Nothing of importance rarely is.
7
posted on
02/07/2006 2:12:04 PM PST
by
Frenetic
Comment #8 Removed by Moderator
To: Centurion2000
(Will run Linux) The Power chip roadmaps from a few years ago caused some confusion in that they indicated that IBM would be using a 65 nanometer process for these chips, due in 2006 and 2007, and could be ramping clock speeds up as high as 6 GHz. The roadmap characterized the clock speeds on the Power6 chips as "ultra high frequency," and unlike the Power4, Power5, and Power5+ chips on the roadmap, the Power6 item did not show two cores, but simply an area that said "cores," plural. It also said "L2 caches," and said "Advanced System Features" instead of the distributed switch that occupies two sides of every Power4, Power4+, Power5, and Power5+ chip. This distributed switch is the high-speed interconnection that allows four dual-core Power chips to be lashed together into an eight-way SMP server inside a multichip module (MCM), which is a single piece of electronics that is about as big as the palm of your hand. This MCM also contains the L3 caches. To make a big SMP box, like the 64-way Squadron i5 595 and p5 595 machines, you put eight of these eight-core MCMs on cell boards (which IBM calls books) and you have made a big, bad box.
To: Revolting cat!
IBM was purposely screwing Apple and holding them hostage by limiting supply. Chances are they wouldn't have delivered this new chip to Apple in sufficient quantities - and on time - even if Apple had stayed, nor if they tried to go back now.
To: Revolting cat!
Uh, oh, Apple's going back to IBM!
Looks like Apple chose the wrong horse. And about MS, with the planned DMR on Vista, the 4 or 5 ghz chip will run like a 2 Ghz chip.
To: LesbianThespianGymnasticMidget
And I just bought two new computers for work......
12
posted on
02/07/2006 2:15:46 PM PST
by
usmcobra
(I'm a Marine on currently on inactive status awaiting an eternal change of duty station)
To: Centurion2000
Great ... .what software will be using the new speeds? I'm sure I will find it useful for:
1) Editing high definition video
2) Manipulating double-digit megapixel images
3) Compressing 7-channel audio
and
4) The number-crunching I do at work.
Large amounts of fast memory will also be useful for these tasks.
What, did you thing you had some kind of "Gotcha" question?
13
posted on
02/07/2006 2:16:37 PM PST
by
ArrogantBustard
(Western Civilisation is aborting, buggering, and contracepting itself out of existence.)
To: Centurion2000
They ought to be able to run Word fairly successfully :-)
14
posted on
02/07/2006 2:17:24 PM PST
by
Andonius_99
(They [liberals] aren't humans, but rather a species of hairless retarded ape.)
To: rdb3; chance33_98; Calvinist_Dark_Lord; Bush2000; PenguinWry; GodGunsandGuts; CyberCowboy777; ...
15
posted on
02/07/2006 2:18:14 PM PST
by
ShadowAce
(Linux -- The Ultimate Windows Service Pack)
To: Andonius_99
Word and PowerPointless will still be painful.
16
posted on
02/07/2006 2:18:44 PM PST
by
ArrogantBustard
(Western Civilisation is aborting, buggering, and contracepting itself out of existence.)
To: ArrogantBustard
17
posted on
02/07/2006 2:18:49 PM PST
by
null and void
(If the Muslim world can be brought to its knees by 12 cartoons, let's give them a whole comic book!)
To: null and void
That's not the number-crunching I do at work ...
18
posted on
02/07/2006 2:19:35 PM PST
by
ArrogantBustard
(Western Civilisation is aborting, buggering, and contracepting itself out of existence.)
To: LesbianThespianGymnasticMidget
If you read the article, notice it mentions software as a necessity for the power, and probably performance gains. IBM's POWER chips are tied closely to the OS, which is something you can't really do for a desktop. For example, much of the POWER5's SMT is implemented in software, not hardware as Intel did with "hyperthreading."
This really is a server chip. We couldn't expect even a scaled-down desktop version like the PPC970 until quite a bit after this thing is in production.
To: ArrogantBustard
That's why I said AND designing nukes, not SUCH AS designing nukes.
;^P
[Methinks thou doth protest a wee bit too much]
20
posted on
02/07/2006 2:22:42 PM PST
by
null and void
(If the Muslim world can be brought to its knees by 12 cartoons, let's give them a whole comic book!)
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