Intel plans demo of Opteron rival: 'CT'

CNET ^ | January 29, 2004, 1:32 PM PST | Stephen Shankland

[Ernest_at_the_Beach]

Intel plans to demonstrate a 64-bit revamp of its Xeon and Pentium processors in mid-February--an endorsement of a major rival's strategy and a troubling development for Intel's Itanium chip.

The demo, which follows the AMD64 approach of Intel foe Advanced Micro Devices, is expected at the Intel developer conference, Feb. 17 through 19 in San Francisco, said sources familiar with the plan. Intel had code-named the technology Yamhill but now calls it CT, sources said.

Adding 64-bit features would let "x86" chips such as Intel's Xeon and Pentium overcome today's 4GB memory limit but would undermine the hope that Intel's current 64-bit chip, Itanium, will ever ship in large quantities. A CT demonstration would send the message that prospective Itanium customers should put Itanium purchases on hold, said Peter Glaskowsky, Microprocessor Report editor in chief.

"If they put all the effort into Xeon they put into Itanium, it could be a very impressive thing. They could get very close to the performance levels of Itanium," Glaskowsky said. But there would be a cost: "In the long run, if they were really serious about x86-64...it would kill Itanium."

That would hurt Intel, which has staked much of its reputation on Itanium, but it would affect partners such as Hewlett-Packard and Silicon Graphics more; both rely on Itanium for their future server designs.

Intel spokesman Bill Kircos declined to comment on the CT name or plan other than to say, "We will include extensions in our chips if our customers are requesting it and if the infrastructure is available including a production operating system...tools, software and applications."

Kircos also maintained that Itanium "has turned a corner" and is achieving mainstream acceptance in the high-end server market. "The CIOs who buy Itanium are more conservative than Pat Buchanan," unwilling to make dramatic computing changes overnight. "This is a marathon, not a sprint."

The CT name follows a pattern Intel uses to name features the Santa Clara, Calif.-based chipmaker is building into its chips: the already released HT hyperthreading technology that lets a single chip act in some ways like two; the VT "Vanderpool" technology for running multiple operating systems on one chip; and the LT "LaGrande" security technology.

AMD's Opteron is catching on. In the third quarter--only the second since Opteron's April debut--about 10,746 Opteron servers were sold, more than twice the 4,957 Itanium systems, according to market researcher IDC. However, Opteron and Itanium shipments both are far short of the 1.18 million servers that shipped with Intel's Xeon or Pentium or AMD's Athlon.

Major names have joined several second-tier companies to sell Opteron servers, including IBM, Sun Microsystems and, according to sources, soon Hewlett-Packard, too.

Itanium has been able to run x86 software only very slowly, though Intel says performance is improving with a software emulation technology called IA-32 Execution Layer. In contrast, AMD's x86-64 approach, now called AMD64, runs the vast quantity of existing software for Pentium and Xeon.

An Intel CT demonstration doesn't mean the technology is ready for mainstream use, however.

Analysts believe that as with hyperthreading, Vanderpool and LaGrande, Intel put the technology into chips but is waiting to enable it until necessary software support catches up. Insight64 analyst Nathan Brookwood and Glaskowsky believe CT was built into an upcoming Pentium 4 version called Prescott, due Feb. 2.

That means CT would also be in Prescott's Xeon derivatives--"Nocona" for dual-processor systems and "Potomac" for those with four or more processors.

However, Brookwood believes Intel will wait for the appearance of Prescott's successor, called Tejas, which is due in early 2005. The reason for the wait, Brookwood believes, is that the Prescott designs were complete before Intel had access to AMD's approach, meaning that software tuned for one wouldn't work on the other.

"They need that compatibility now," Brookwood said. "I believe that Tejas is coming so hard on Prescott's heels (because) Tejas has the compatibility that is not in Prescott and Prescott derivates."

Because of the Itanium commitment, Intel currently is reluctant to talk about how great CT could make Xeon, Glaskowsky said. "They cannot afford to say that, because they're not sure yet that they want to do this," he said.

[Ernest_at_the_Beach]

AMD is doing so good that intel has to answer them!

[Liberal Classic]

Though I understand the need for transitional products, I would be afraid to buy a CT since will go the way of the 486-SX.

[Ernest_at_the_Beach]

fyi

[Ernest_at_the_Beach]

I am very happy with my lowend AMD64!

[JustAnAmerican]

"AMD is doing so good that intel has to answer them.

Bump to that!. Funny part is INTEL will just try to make one of its current chip lines perform like an OP, and will end up with something much worse. Without AMD, INTEL would still be trying to tell us it was impossible to make anything faster then a 400mhz chip. Competition, ya gotta love it.:)

[11B3]

Just built a dual P4 Xeon workstation. I wish I'd gone Opteron.

[Liberal Classic]

I have been happy with AMD for quite a while, and am planning on buying a dual Opeteron system since I (somewhat embarassed to admit) desire more than 4GB of RAM. Of course, I'm planning on running a 64-bit operating system on it, too.

In the home segment, CPU technology tends to run some years ahead of operating systems. Windows 3.x ran for a long time, and there are still lots of those systems out there. The 386 CPU was 32-bit then but Windows wasn't 32-bit until 95 came out. Same thing with Mac OS on Motorola. I don't think Intel should put too much effort into breathing life into 32-bit architechture. I imagine people will run XP and server 2003 for a long time even though the hardware is capable of running 64-bit. The server market is nearly all 64-bit now, and the consumer market will follow eventually.

[B Knotts]

And so we come to the final chapter in that sad story entitled "Itanic."

[Ernest_at_the_Beach]

Money reasons or Performance reasons?

[Ernest_at_the_Beach]

You would think they would have lerned something from IBM's experience with the 360 snafu replacement with FS (Future Systems ). Much Much Money spent on that fiasco!!!

[tortoise]

Just built a dual P4 Xeon workstation. I wish I'd gone Opteron.

The Opterons are wicked fast at just about everything you can throw at them. Most other processors are only fast in certain narrow application spaces, but the AMD64 systems are wicked fast at pretty much everything. And it is a very scalable architecture too. We are migrating all our database servers to Opteron systems because nothing else scales like they do for the dollar.

Right now, the AMD Opteron derived CPUs are the general purpose high performance processor, and they are set up for a long run on the market. The secret behind the performance is theoretically simple; they have an extremely fast and scalable memory and I/O subsystem that is unique in the commodity processor market. That subsystem was originally designed to be the next generation CPU fabric for Cray, but was then purchased by AMD.

AMD has been producing some very nice chips for a few years now, but the Opteron is really head and shoulders above the competition for the high-end commodity server market, and with architectural capabilities that allow it to be used effectively in extremely high-end "non-commodity" systems. AMD is now leading the way rather than following Intel.

[MD_Willington_1976]

Just a tid bit for those that didn't know, the Hyper-Threading feature that Intel has in its CPU's and is tooting it PR horn over was actually invented by AMD...

Ouch thats gotta hurt...

here's the link

http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=/netahtml/search-bool.html&r=7&f=G&l=50&co1=AND&d=ptxt&s1=5,944,816&OS=5,944,816&RS=5,944,816

Microprocessor configured to execute multiple threads including interrupt service routines


Abstract
A microprocessor including a context file configured to store multiple contexts is provided. The microprocessor may execute multiple threads, each thread having its own context within the microprocessor. In one embodiment, the present microprocessor is capable of executing at least two threads concurrently: a task and an interrupt service routine. Interrupt service routines may be executed without disturbing a task's context and without performing a context save operation. Instead, the interrupt service routine accesses a context which is independent of the context of the task. In another embodiment, the context file includes multiple interrupt service routine contexts. Multiple ISR context storages allow for nested interrupts to be performed concurrently. In yet another embodiment, the microprocessor is configured to execute multiple tasks and multiple interrupt service routines concurrently. Multiple tasks may be executed concurrently by the microprocessor in addition to executing multiple interrupt service routines concurrently. In still another embodiment, the microprocessor includes a primary context and multiple local context storages coupled to each of its execution units. A given execution unit may execute instructions referencing the primary context or the local context connected thereto.

Inventors: Dutton; Drew J. (Austin, TX); Christie; David S. (Austin, TX); Barnes; Brian C. (Round Rock, TX)
Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA)
Appl. No.: 649809
Filed: May 17, 1996


Later

MD

[ryanjb2]

Even though I run an AMD processor now, my next chip will be Intel. This is because I dislike AMD. I don't like "underdogs."

[Ernest_at_the_Beach]

LOL.....OK!!!

[Ernest_at_the_Beach]

Now that is just very interesting!!!

Hyperthread is the only thing keeping the top end Pentiuum's competitive!

[mikegi]

Just built a dual P4 Xeon workstation. I wish I'd gone Opteron.

You can give me your dual Xeon if you're so unhappy. I was running an el' cheapo dual Celeron 400 on an Abit Bp6 for a long time. It was great. The dual cpus really make for smooth running.

The x86-64 stuff is way overblown right now. Over 99% of users don't need it. In fact, you could say that your own Xeon system is a 128bit since it uses SSE/SSE2 instructions.

[mikegi]

The secret behind the performance is theoretically simple; they have an extremely fast and scalable memory and I/O subsystem that is unique in the commodity processor market.

AMDs performance is due to shorter, more efficient pipelines and large L1 caches. The P4 beats AMD on multimedia processing because of the faster memory streaming and better SSE/SSE2 performance. AMD wins on general purpose computing because of the pipeline and L1 cache.

[MD_Willington_1976]

Yep and on the other hand, more companies use Hyper-Transport then Hyper-Threading...

Although they are not the same thing, many companies are adopting Hyper Transport as THE interconnect between IC's...

From

http://www.hypertransport.org/index.html

HyperTransport universal chip-to-chip communications technology is an advanced high-speed, high-performance, point-to-point link for integrated circuits. HyperTransport provides a universal connection that is designed to reduce the number of buses within the system, provide a high-performance link for embedded applications, and enable highly scalable multiprocessing systems. Originally designed to optimize high performance personal computers, it has been extended by the HyperTransport Consortium to provide significant benefits to desktop and mobile personal computers, networking equipment, servers, consumer products and embedded applications.

The HyperTransport Technology Consortium manages and controls the HyperTransport technology specification and it promotes the business interests of consortium member companies. Consortium members include leading providers of computing, networking, communications, embedded, software and IP products and services.

Advanced Micro Devices, Alliance Semiconductors, Apple Computers, Broadcom Corporation, Cisco Systems, NVIDIA, PMC-Sierra, Sun Microsystems, and Transmeta are charter members and comprise the Executive Committee of the HyperTransport Technology Consortium.


Intel is NOT part of the consortium

Later

MD

[Ernest_at_the_Beach]

From your link:

HyperTransport Products